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Qualcomm Taps TSMC for 3nm/2nm Dragonfly C100 CPUs, AI300 Accelerators

TSMC to fab Qualcomm's Dragonfly C100 and AI300 chips on 3nm/2nm nodes. The move challenges NVIDIA in data center AI, but timelines and performance remain undisclosed.

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Which TSMC nodes will Qualcomm use for its Dragonfly C100 and AI300 chips?

TSMC will manufacture Qualcomm's Dragonfly C100 data center CPUs and AI300 AI accelerators on 3nm/2nm nodes, using CoWoS or SoIC packaging, per a media report cited by @dnystedt.

TL;DR

TSMC to fab Qualcomm Dragonfly C100 CPUs on 3nm/2nm · AI300 accelerator chip also at TSMC · CoWoS or SoIC advanced packaging planned

TSMC will fab Qualcomm's Dragonfly C100 data center CPUs and AI300 AI accelerators on 3nm/2nm nodes. The chips will use CoWoS or SoIC advanced packaging, per a media report cited by @dnystedt.

Key facts

  • Dragonfly C100 is a Qualcomm data center CPU
  • AI300 is an AI accelerator chip
  • TSMC 3nm/2nm nodes targeted
  • CoWoS or SoIC advanced packaging planned
  • Qualcomm previously cancelled Centriq 2400 server CPU in 2018

TSMC is expected to manufacture Qualcomm’s Dragonfly C100 data center CPUs and AI300 AI accelerator chips on 3nm/2nm nodes, using CoWoS or SoIC advanced packaging, according to a media report cited by @dnystedt. The report, which references unnamed sources, marks a deepening of the foundry relationship between the two companies.

Key Takeaways

  • TSMC to fab Qualcomm's Dragonfly C100 and AI300 chips on 3nm/2nm nodes.
  • The move challenges NVIDIA in data center AI, but timelines and performance remain undisclosed.

What the Dragonfly C100 and AI300 Are

Unlocking the Future: TSMC’s Bold Strategy for the 2nm Revolution!

The Dragonfly C100 is Qualcomm’s push into server-class CPUs, targeting data center workloads where the company has historically been absent. The AI300 accelerator is an AI inference and training chip, competing with NVIDIA’s H100/B200 and AMD’s MI300X. Both chips leverage TSMC’s most advanced nodes — 3nm (N3 family) for the CPU and likely 2nm (N2) for the AI accelerator — to maximize transistor density and power efficiency.

Advanced Packaging as a Differentiator

The mention of CoWoS (Chip-on-Wafer-on-Substrate) or SoIC (System-on-Integrated-Chips) packaging is critical. CoWoS is the standard for high-bandwidth memory integration, used by NVIDIA and AMD for their AI GPUs. SoIC, a more advanced 3D stacking technology, could allow Qualcomm to integrate compute dies with HBM or SRAM more tightly, reducing latency and power. The choice of packaging will determine memory bandwidth — a key constraint for AI accelerators.

Competitive Positioning

Unlocking the Future: TSMC’s Bold Strategy for the 2nm Revolution!

If the report holds, Qualcomm will join the small club of companies with access to TSMC’s bleeding-edge nodes — alongside Apple, NVIDIA, AMD, and Intel. The move comes as Qualcomm’s Nuvia-based CPU cores (acquired in 2021) are being adapted for server use, and as the company seeks to diversify beyond mobile and automotive. The AI300 accelerator directly challenges NVIDIA’s dominance in data center AI, though Qualcomm has not disclosed performance targets or volume commitments.

Unknowns

The report provides no timeline for tape-out or production, nor pricing or expected performance. Qualcomm has not officially confirmed the Dragonfly C100 or AI300; the company’s last public data center CPU play, the Centriq 2400, was cancelled in 2018 after a brief run. Investors will watch for any official announcement at upcoming events like Computex or Hot Chips.

What to watch

Watch for Qualcomm’s official confirmation at Computex 2026 (June) or Hot Chips (August). Any disclosed performance benchmarks versus NVIDIA’s B200 or AMD’s MI400 will determine the competitive threat. Also track TSMC’s N2 capacity allocation — Qualcomm will compete with Apple and AMD for scarce 2nm wafers.

[Updated 26 Jun via dck_news]

Meta has signed on as a customer for Qualcomm's data center CPUs, according to a report [per Data Center Knowledge]. Qualcomm also disclosed a second unnamed hyperscaler customer and aims to build a $15 billion data center chip business by 2029. The AI300 accelerator will be available via a new Qualcomm AI Infrastructure Platform, integrating networking and software.


Sources cited in this article

  1. Data Center Knowledge
  2. Unknowns The
  3. Any
Source: gentic.news · · author= · citation.json

AI-assisted reporting. Generated by gentic.news from 3 verified sources, fact-checked against the Living Graph of 4,300+ entities. Edited by Ala SMITH.

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AI Analysis

This report, if accurate, represents Qualcomm’s most serious attempt at the data center since the Centriq 2400’s cancellation in 2018. The choice of TSMC’s 3nm/2nm nodes and advanced packaging (CoWoS or SoIC) signals a willingness to spend heavily on leading-edge manufacturing — a prerequisite for competing with NVIDIA’s B200 and AMD’s MI400. However, the lack of disclosed performance numbers or volume commitments suggests the chips are still in early design stages, possibly pre-silicon. The packaging choice is the most telling detail. SoIC, TSMC’s 3D stacking technology, would allow Qualcomm to integrate HBM4 memory directly atop the compute die, potentially offering bandwidth advantages over NVIDIA’s CoWoS-based approach. But SoIC is still ramping at TSMC and carries yield risks. If Qualcomm opts for CoWoS instead, it signals a conservative strategy — prioritizing time-to-market over differentiation. The real question is whether Qualcomm can secure enough TSMC N2 capacity. Apple is the anchor tenant for N2, and AMD and NVIDIA will also compete for allocation. If Qualcomm cannot secure volume, the Dragonfly C100 and AI300 risk remaining niche products. The 2018 Centriq failure showed that even good silicon can fail without a software ecosystem; Qualcomm will need to invest heavily in ROCm or CUDA compatibility to win AI workloads.
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