A Chinese research team reported a breakthrough in carbon nanotube complementary FET (CFET) architecture. The team claims a 3x performance improvement over silicon at equivalent 2nm node dimensions, potentially bypassing EUV lithography constraints.
Key facts
- 3x claimed performance gain over silicon at 2nm.
- Carbon nanotube CFET bypasses EUV lithography.
- China's domestic AI chip budget rose to 46%.
- No peer-reviewed paper or benchmark data published.
- DeepSeek, Zhipu exploring custom silicon alternatives.
A Chinese research team reported a breakthrough in carbon nanotube complementary FET (CFET) architecture, claiming a 3x performance improvement over silicon at equivalent 2nm node dimensions. The carbon nanotube CFET design could bypass EUV lithography constraints entirely, a critical advantage as TSMC and Samsung struggle with yield at 2nm. According to TrendForce
The breakthrough arrives as China's domestic AI chip budget share reportedly rose from 30% to 46%, per TrendForce, driven by DeepSeek and Zhipu exploring custom silicon. The carbon nanotube CFET approach promises denser, lower-power transistors without requiring extreme ultraviolet (EUV) lithography — a technology China cannot access due to US export controls. The team did not disclose fabrication yield, energy-delay product, or specific benchmark results.
No peer-reviewed paper or benchmark data has been published yet. The claim should be treated with skepticism until independent verification emerges. Previous Chinese carbon nanotube transistor claims in 2024 proved difficult to reproduce at scale.
Key Takeaways
- Chinese team claims 3x carbon nanotube CFET gain over silicon at 2nm, bypassing EUV.
- No peer review; skepticism warranted.
Why This Matters for AI Compute
If validated, carbon nanotube CFETs could reshape the AI chip supply chain. Chinese AI labs — DeepSeek, Zhipu, Alibaba's Qwen team — are already shifting to domestic silicon, with Huawei's Ascend chips projected to reach 2030 targets via the Tau Scaling Law V2 paper. A carbon nanotube fab process would decouple AI chip performance from EUV access, potentially accelerating China's AI compute independence within 3-5 years.
The development also pressures TSMC and Samsung, who are investing $40B+ in 2nm EUV fabs. A disruptive non-silicon architecture could render those investments partially stranded if performance claims hold at scale.
What to watch
Watch for the peer-reviewed paper or independent replication. If a Chinese foundry (SMIC, Huawei) announces a pilot line within 12 months, the claim has legs. Also track TSMC's 2nm yield disclosures — if they remain below 60%, the CFET narrative strengthens.
Source: news.google.com
