Google's next TPU, codenamed Humufish, will use Intel's EMIB-T instead of TSMC CoWoS. According to @SemiAnalysis_ this marks the first flagship AI accelerator to abandon TSMC's dominant 2.5D packaging flow.
Key facts
- Google's next TPU codenamed Humufish uses Intel EMIB-T.
- First flagship AI chip to drop TSMC CoWoS packaging.
- EMIB embeds silicon bridges in organic substrate.
- CoWoS uses a single large silicon interposer.
- TSMC CoWoS lead times exceed 12 months.
Google's next TPU, codenamed Humufish, will use Intel's EMIB-T instead of TSMC CoWoS. According to @SemiAnalysis_ this marks the first flagship AI accelerator to abandon TSMC's dominant 2.5D packaging flow.
Nearly every leading AI training accelerator today is packaged on a TSMC 2.5D flow, and almost all of it is CoWoS. CoWoS is the industry default, which is exactly why a flagship part moving off it is worth attention.
The core difference. CoWoS places all dies on a single large silicon/RDL interposer. EMIB embeds small silicon bridges directly in the organic substrate, only where die-to-die links are needed. This reduces cost and complexity by eliminating the large interposer, but introduces new thermal and alignment challenges for high-bandwidth die-to-die connections.
Why EMIB-T Matters for AI Supply Chains
TSMC CoWoS has been a bottleneck for AI GPU supply since 2023, with lead times stretching over 12 months [per prior reports]. By moving Humufish to Intel's EMIB-T, Google gains a second packaging source, potentially easing constraints on its own TPU shipments while diversifying away from TSMC's monopoly.
Intel's EMIB-T is the through-silicon-via variant of its embedded bridge technology, designed for multi-die packages with high bandwidth. The 'T' indicates through-silicon vias that enable vertical stacking, a feature CoWoS also supports. The trade-off: EMIB uses smaller bridges only where needed, which can reduce die area and cost versus CoWoS's full-interposer approach, but may limit total interconnect density if many dies require bridges.
The move also signals Intel Foundry's growing credibility in advanced packaging. Intel has been marketing EMIB and Foveros as alternatives to TSMC's CoWoS and InFO for years, but had not landed a high-volume AI chip until now. Google's TPU volume — estimated at hundreds of thousands of units per year — provides a validation point for Intel's packaging roadmap.
What This Means for TSMC
TSMC's CoWoS capacity is sold out through 2026, driven by NVIDIA, AMD, and Amazon Trainium. Losing Google's TPU business to Intel does not materially impact TSMC's near-term revenue, but it creates a precedent. If other hyperscalers follow Google's lead, TSMC's packaging monopoly could erode.
The timing is notable: Humufish is likely Google's sixth-generation TPU, expected to ship in late 2026 or early 2027. By then, Intel's EMIB-T production should be mature, and Google will have had years of experience with Intel's packaging from earlier collaborations.
What to watch
Watch for Google's official Humufish announcement in late 2026 or early 2027. If EMIB-T yields match CoWoS, expect other hyperscalers to evaluate Intel packaging for next-gen ASICs, potentially shifting the $10B+ advanced packaging market.
