optical networking
11 articles about optical networking in AI news
IOWN Forum Pushes All-Photonic WAN for AI Neocloud Interconnects
The IOWN Global Forum is focusing its optical networking tech on datacenter interconnects, aiming to let GPU 'neoclouds' and financial firms use cheaper, remote facilities without latency penalties for AI workloads.
Cisco Reveals Scale-Across GPU Networking Needs 14x DCI Bandwidth
Cisco's chief architect detailed the massive bandwidth requirements for connecting AI clusters via 'scale-across' GPU networking, which needs 14x the capacity of traditional data center interconnects. This shift is creating a multi-billion dollar market for 800G coherent pluggables and deep-buffered switches.
Foxconn to Mass-Produce 10,000+ CPO Optical Switches for AI in Q3 2026
Foxconn's manufacturing arm will begin volume production of advanced co-packaged optics (CPO) switches in Q3 2026, targeting over 10,000 units. This move directly addresses the critical bandwidth and power bottlenecks in next-generation AI data center infrastructure.
Google's Virgo Network Links 134,000 TPU v8 Chips with 47 Pbps Fabric
Google unveiled its Virgo networking stack for TPU v8, capable of linking 134,000 chips in a single fabric with 47 petabits/sec of bi-sectional bandwidth. This represents a massive scale-up in interconnect technology for large-scale AI model training.
Nvidia Partners Corning for US Fiber Manufacturing, Prepaying Billions
Nvidia partners Corning for US fiber manufacturing with multibillion-dollar prepayments, increasing domestic capacity by 50%+ for AI GPU cluster interconnects.
NVIDIA Vera Rubin VR NVL72: Value Extraction Engine Arrives
NVIDIA's Vera Rubin VR NVL72 shifts from value vendor to value extractor, targeting TCO. SemiAnalysis argues this overturns prior pricing paradigm.
Google Virgo Fabric: 100K-Accelerator AI Network Cuts Latency
Google unveiled Virgo, a data center fabric for AI clusters of 100,000+ accelerators, using a flatter two-layer topology to reduce latency and improve bisection bandwidth for synchronized training workloads.
Nvidia's Silicon Photonics Roadmap Targets AI Data Center Bottlenecks
Nvidia is developing its own silicon photonics-based interconnects to address the growing data transfer bottleneck within AI data centers and supercomputers. This move is critical as AI model size and cluster scale continue to grow exponentially.
Google, Marvell in Talks to Co-Develop New AI Chips, Including TPU-Optimized MPU
Google is reportedly in talks with Marvell Technology to co-develop two new AI chips: a memory processing unit (MPU) to pair with TPUs and a new, optimized TPU. This move is a direct effort to bolster Google's custom silicon stack and compete with Nvidia's dominance.
Nvidia Invests $2B in Marvell to Expand NVLink Fusion Chip Partnership
Nvidia is investing $2 billion in Marvell Technology to deepen their partnership on NVLink Fusion, a chip-to-chip interconnect crucial for scaling AI training clusters. This strategic move aims to secure supply and accelerate development of high-bandwidth links between GPUs and custom AI accelerators.
Compute Constraints Create Double Bind for AI Growth: Ethan Mollick
Ethan Mollick highlights a critical industry bottleneck: compute scarcity forces a trade-off between raising prices/rationing current models and limiting future model training, creating a growth double bind.