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chips act

30 articles about chips act in AI news

US 'Stop Stealing our Chips Act' Would Pay Whistleblowers 10-30% of Export Fines

Proposed US law would pay whistleblowers 10-30% of export-control fines, targeting AI chip smuggling to China through intermediaries like Malaysian resellers.

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Broadcom to Manufacture Google TPU Chips in Foundry Partnership

Google has licensed its Tensor Processing Unit (TPU) intellectual property to Broadcom for chip fabrication. This allows Google to earn from its IP while Broadcom manages the complex hardware build and networking integration.

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Nvidia's Jensen Huang Dismisses Custom AI Chip Threat: 'Science Projects' Versus 'AI Factories'

Nvidia CEO Jensen Huang confidently dismissed concerns about custom AI chips challenging Nvidia's dominance, framing competitors' efforts as 'science projects' while Nvidia builds revenue-generating 'AI factories' with a complete platform approach.

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Apple Asks Trump to OK Chinese Memory Chips; Micron Warns of Industry Collapse

Apple asked Trump to approve Chinese memory chips; Micron warns it could destroy US industry. Prices quadrupled, margins exceed 80%.

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Rimnot, Yuantu Deploy 10K Robots in Server Factories by 2027

Rimnot partners Yuantu for 10K robots in server factories by 2027, achieving 30-minute adaptation at WAIC.

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zAI Completes 1-Gigawatt AI Data Center Without Nvidia Chips

zAI built a 1GW AI data center in China with no Nvidia chips, using only domestic silicon. It supports frontier GLM model development and has begun operations.

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Japan to Buy 27,500 Nvidia Rubin Chips for Robot AI

Japan to buy 27,500 Nvidia Rubin chips for sovereign robot AI model, signaling strategic push in embodied intelligence.

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US Allows ZTE to Buy Nvidia H200 AI Chips, Joining Alibaba, Tencent

US authorized ZTE to buy Nvidia H200 AI chips, joining Alibaba, Tencent, ByteDance in accessing Hopper architecture under targeted export controls.

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DeepSeek, Zhipu AI Build Custom Inference Chips to Cut GPU Dependency

DeepSeek and Zhipu AI are developing custom inference chips to cut GPU costs. China's domestic chip budget share hit 46% in July 2026.

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IBM Shows Sub-1-nm Chips, Targeting Production in 5 Years

IBM showed sub-1-nm chips at IEDM, targeting production in 5 years. It challenges TSMC and Intel in the race to shrink transistors for AI workloads.

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Amazon Opens Trainium Chips to Outside Data Centers, Targeting Nvidia's Core Business

AWS AI chief Peter DeSantis confirmed Amazon is negotiating to sell Trainium chips externally for the first time, backed by Andy Jassy's estimate of a $50B annual revenue potential. With Trainium3 sold out, Trainium4 pre-booked, and Anthropic and OpenAI already running gigawatts of Trainium capacity

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Google’s Virgo network interconnects 134K TPUv8t chips at 47 Pbps

Google's Virgo network interconnects 134,400 TPUv8t chips at 47 Pbps, targeting large-scale training clusters.

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Huawei Hits 1.5µm Bond Pitch in Kirin 2026 Chips, Beats TSMC

Huawei's 2026 Kirin chips achieve 1.5µm hybrid bonding pitch, 16-36x denser than TSMC. Next year targets 1µm.

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Google TPU 'Broadfly' Topology Scales Pod to 1,152 Chips

Google unveiled a Broadfly TPU topology at Cloud Next, scaling pods to 1,152 chips — 4.5x larger than Ironwood — with max 7 hops. This inference-first design challenges NVIDIA's NVLink on scale and latency.

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Nvidia Partners Corning for US Fiber Manufacturing, Prepaying Billions

Nvidia partners Corning for US fiber manufacturing with multibillion-dollar prepayments, increasing domestic capacity by 50%+ for AI GPU cluster interconnects.

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NVIDIA Vera Rubin VR NVL72: Value Extraction Engine Arrives

NVIDIA's Vera Rubin VR NVL72 shifts from value vendor to value extractor, targeting TCO. SemiAnalysis argues this overturns prior pricing paradigm.

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Google's Virgo Network Links 134,000 TPU v8 Chips with 47 Pbps Fabric

Google unveiled its Virgo networking stack for TPU v8, capable of linking 134,000 chips in a single fabric with 47 petabits/sec of bi-sectional bandwidth. This represents a massive scale-up in interconnect technology for large-scale AI model training.

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Google, Marvell in Talks to Co-Develop New AI Chips, Including TPU-Optimized MPU

Google is reportedly in talks with Marvell Technology to co-develop two new AI chips: a memory processing unit (MPU) to pair with TPUs and a new, optimized TPU. This move is a direct effort to bolster Google's custom silicon stack and compete with Nvidia's dominance.

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Canada's AI Compute Gap: Google Cloud Montreal Offers 2017-Era Chips

A technical developer's attempt to rent modern AI compute in Canada revealed a stark infrastructure gap, with major providers offering chips as old as 2017, undermining national AI ambitions.

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Anthropic Considers Custom AI Chips, Following Google & OpenAI

Anthropic is reportedly considering developing custom AI chips, a strategic move to gain control over its compute infrastructure and reduce costs. This follows similar initiatives by Google, Amazon, and OpenAI.

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DeepSeek V4 to Run on Huawei Ascend 950PR Chips, Sparking 20% Price Surge

DeepSeek's anticipated V4 model will be powered by Huawei's Ascend 950PR chips, with Alibaba, ByteDance, and Tencent stockpiling hundreds of thousands of units ahead of launch. This has driven chip prices up approximately 20% in recent weeks.

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Apple Announces Plans to Increase US iPhone Parts Manufacturing, Continuing Supply Chain Diversification

Apple has announced plans to manufacture more iPhone components within the United States. This continues a multi-year strategy to diversify its supply chain away from concentrated geographic regions.

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Elon Musk Announces $20 Billion Austin Chip Fab, Calls It Most Ambitious Manufacturing Project Since Manhattan Project

Elon Musk announced a $20 billion semiconductor fabrication plant in Austin, Texas, describing it as the most ambitious manufacturing project since the Manhattan Project. The announcement was made via a retweet but lacks specific technical details on node size, capacity, or timeline.

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The Invisible Dance: How AI Chip Manufacturing Relies on Microscopic Wire Bonding

High-speed semiconductor wire bonding creates thousands of electrical connections per minute using ultra-fine 25-micron wires. This critical but often overlooked process enables the AI chips powering today's most advanced systems.

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Google's $1.9 Trillion Vertical Integration Strategy: Building an AI Empire from Chips to Power Grid

Google is investing $1.9 trillion over the next decade to control every layer of the AI stack, from custom TPU chips to power infrastructure. This vertical integration strategy creates a competitive moat that could reshape the entire AI industry landscape.

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The AI Espionage Frontier: Anthropic Exposes Systematic Claude Data Extraction by Chinese AI Labs

Anthropic has revealed that Chinese AI companies DeepSeek, Moonshot, and MiniMax allegedly used 24,000 fake accounts to execute 16 million queries against Claude's API, systematically extracting its capabilities through model distillation techniques. This sophisticated operation bypassed access restrictions and targeted Claude's reasoning, programming, and tool usage functions.

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Nvidia Invests $1B in Naver, Expands SK Group Pact for Korea AI Hub

Nvidia invests $1B in Naver for an AI data center in South Korea and expands its SK Group accord. The deals lock in Asian supply chains and data center capacity.

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Meituan Open-Sources 1.6T-Parameter LongCat-2.0 Trained on Domestic Chips

Meituan open-sourced 1.6T-parameter LongCat-2.0 trained on 50,000 domestic ASICs, claiming China's first full-process domestic-chip trillion-parameter model.

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ByteDance Buys Tens of Thousands of Iluvatar AI Chips as China Sourcing

ByteDance bought tens of thousands of Iluvatar CoreX AI processors, signaling a major shift from Nvidia to second-tier domestic chipmakers for cloud AI workloads.

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Apple's Neural Engine Jailbroken: Researchers Unlock Full Training Capabilities on M-Series Chips

Security researchers have reverse-engineered Apple's Neural Engine, bypassing private APIs to enable full neural network training directly on ANE hardware. This breakthrough unlocks 15.8 TFLOPS of compute previously restricted to inference-only operations across all M-series devices.

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