chip packaging
30 articles about chip packaging in AI news
China PLP System Passes Validation at 510×515mm Panel Size
CFMEE validated a 510×515mm PLP system for AI chip packaging, challenging TSMC and Intel. The system targets HBM and AI accelerators, with potential 30% cost savings.
Theta-TaN Metal Hits 1,100 W/mK Thermal Conductivity, 3× Copper
UCLA and Tohoku University created theta-TaN with 1,100 W/mK thermal conductivity, 3× copper, approaching diamond-level heat dissipation for AI chip packaging.
China Blank-Checks Huawei for Inference Chip Push
China is giving Huawei a blank check for inference chips, per a tweet by Natolambert on February 3, 2026, shifting focus from training to inference.
Anthropic Explores Custom AI Chip with Samsung
Anthropic is discussing a custom AI chip with Samsung, per The Information. The move follows OpenAI's Jalapeño chip and signals growing vertical integration in AI hardware.
Cerebras Reengineers Mechanical Playbook for Wafer-Scale Chip Cooling
Cerebras disclosed three mechanical innovations—vertical power delivery, flexible interposers, and direct-impingement cooling—to prevent wafer-scale chips from cracking, rewriting engineering fundamentals.
The $500B AI Chip Bottleneck: One Material, One Supplier
A single Japanese chemical company supplies 98% of the thin-film material used in every AI chip on earth. NVIDIA is paying half the capex to expand supplier fabs as lead times stretch past 6 months.
Nvidia Invests $2B in Marvell to Expand NVLink Fusion Chip Partnership
Nvidia is investing $2 billion in Marvell Technology to deepen their partnership on NVLink Fusion, a chip-to-chip interconnect crucial for scaling AI training clusters. This strategic move aims to secure supply and accelerate development of high-bandwidth links between GPUs and custom AI accelerators.
TSMC's $56B 2026 CapEx Fuels AI Chip Race with 22 New Fabs
TSMC is constructing up to 22 advanced semiconductor fabs simultaneously, backed by a $52–56 billion capital expenditure plan for 2026. This unprecedented manufacturing scale is critical for producing the 2nm-and-below chips required by next-generation AI models.
Broadcom to Manufacture Google TPU Chips in Foundry Partnership
Google has licensed its Tensor Processing Unit (TPU) intellectual property to Broadcom for chip fabrication. This allows Google to earn from its IP while Broadcom manages the complex hardware build and networking integration.
The Invisible Dance: How AI Chip Manufacturing Relies on Microscopic Wire Bonding
High-speed semiconductor wire bonding creates thousands of electrical connections per minute using ultra-fine 25-micron wires. This critical but often overlooked process enables the AI chips powering today's most advanced systems.
China's Semiconductor Leaders Rally for National AI Chip Alliance Amid Tech War Escalation
China's top semiconductor executives have issued an unprecedented public call for a consolidated national effort to build AI chips, signaling a strategic shift toward self-reliance as U.S. export controls tighten. This coordinated push represents China's most direct response yet to technological containment efforts.
CNAS Report: AI Hits Silicon Wall as Chip Supply Trails $700B CapEx
CNAS report warns semiconductor manufacturing cannot keep pace with AI demand as hyperscalers plan $700B+ CapEx in 2026. Silicon replaces power as the near-term constraint.
AI Chip Capacity Crisis: 10GW Left Through 2030, Prices Up Double Digits
The AI accelerator market has only 10 gigawatts of capacity left for contract through 2030, with 100GW already under contract. Prices are rising double digits as one competitor has stopped taking orders entirely.
Aehr Test Systems Lands $41M AI Chip Order; H2 Bookings Top $92M
Aehr Test Systems received a record $41 million production order from a key hyperscale AI customer. Total bookings for the second half of its fiscal year exceeded $92 million, highlighting surging demand for semiconductor test and burn-in equipment.
Nvidia B200 Costs $6,400 to Produce, Gross Margin Hits 82%
Epoch AI estimates Nvidia's B200 GPU costs $5,700–$7,300 to produce, with HBM memory and advanced packaging accounting for two-thirds of the cost. At a $30k–$40k sale price, chip-level gross margins reach ~82%, though rack-scale margins may be lower.
TSMC Pledges Extra $100B for Arizona, Total US Investment Hits $265B
TSMC pledged $100B more for Arizona fabs, total US investment $265B, driven by AI chip demand. Net income surged 77% to $22B in Q2.
Nvidia Vows 'Giant Amounts' of Vera Rubin as Blackwell Delays Bite
Nvidia CEO Huang pledges 'giant amounts' of Vera Rubin chips, asserting roadmap intact amid Blackwell delays. Japan's $2B+ Rubin factory anchors real demand.
Google TPU Humufish Drops TSMC CoWoS for Intel EMIB-T
Google's next TPU Humufish uses Intel EMIB-T packaging instead of TSMC CoWoS, breaking the industry default for AI accelerators.
Qualcomm Taps TSMC for 3nm/2nm Dragonfly C100 CPUs, AI300 Accelerators
TSMC to fab Qualcomm's Dragonfly C100 and AI300 chips on 3nm/2nm nodes. The move challenges NVIDIA in data center AI, but timelines and performance remain undisclosed.
Jensen Huang's 30-Year TSMC Battle: From 3D Graphics to AI GPUs
A 30-year-old comic shows Jensen Huang convincing TSMC to supply wafers for 3D graphics chips. Today, he's still fighting for wafer supply, but now for AI GPUs, alongside Broadcom, AMD, MediaTek, and Amazon.
Samsung Projects Record $14.6B Q1 Profit on 300% DRAM Price Surge
Samsung Electronics expects a record Q1 operating profit of 20 trillion won (~$14.6B), nearly triple YoY, fueled by soaring AI-driven demand and a 300% price increase for DRAM chips.
OpenAI's $20B Georgia Data Center Tests Gigawatt Buildout
OpenAI announced $20B Georgia data center. Gigawatt buildout faces execution test amid supply chain and power constraints.
Google Chooses Intel EMIB-T for 9th-Gen TPUs, Breaking TSMC's CoWoS Monopoly
Google picks Intel EMIB-T for 9th-gen TPU, breaking TSMC CoWoS monopoly. Move signals architectural bet on power integrity and reticle-free scaling.
Ecolab Closes $4.75B CoolIT Buy to Dominate AI Liquid Cooling
Ecolab closed $4.75B CoolIT acquisition to dominate AI liquid cooling. Deal combines thermal tech with water treatment for data centers.
SemiAnalysis Launches Mythos AI Research Platform
SemiAnalysis launched Mythos, a proprietary AI research platform for semiconductor and AI industry analysis, announced via Twitter on March 5, 2026.
Nvidia Commits $6.5B to Photonics in Supply Chain Bet on AI's Next Bottleneck
Nvidia has invested over $6.5 billion across four photonics suppliers since March 2026, pairing equity stakes with multi-billion-dollar purchase commitments. The deals coincide with capacity expansion announcements from Coherent, Nokia, and Japan's JX Advanced Metals, and signal that optical interco
Google Books Intel for 3M+ TPUs in 2028 as TSMC CoWoS Hits Capacity Wall
Google booked Intel to package 3M+ TPUs in 2028 as TSMC CoWoS capacity caps out. SK hynix tests HBM on Intel EMIB, potentially unlocking Nvidia's Feynman architecture.
MLCC Shortage Threatens AI Server Ramp: Prices Hiking, Lead Times Stretching
MLCCs, cheap components stabilizing voltage in AI servers, face supply crunch as demand grows ~5x by CY27. Lead times stretch, prices hike, new lines take 2 years.
GUC, Wiwynn Partner on Silicon-to-System AI Infrastructure for Hyperscalers
GUC and Wiwynn partner on silicon-to-system AI infrastructure, integrating SoC design, optical I/O, and liquid cooling for hyperscalers.
Intel's UCIe-S Hits 48 Gb/s on 22nm, Beats 3nm EMIB
Intel demonstrated a UCIe-S die-to-die interconnect on 22nm hitting 48 Gb/s/lane over standard organic substrate, beating a 3nm EMIB design with 3× higher data rate and 2.8× higher bandwidth density. This signals a strategic shift away from EMIB for Intel's own products toward UCIe over substrate.