semianalysis
30 articles about semianalysis in AI news
Nvidia's Next-Gen AI Rack Delayed to 2028, SemiAnalysis Says
Nvidia's next-gen AI rack delayed to 2028 on manufacturing snags per SemiAnalysis. Delay benefits AMD and custom silicon rivals.
China's Etch Tool Localization Outpaces Deposition, SemiAnalysis Says
China's etch imports fell 18% YTD while deposition rose 3%, per @SemiAnalysis_, signaling faster domestic etch localization with supply-chain risks for Western tool makers.
SemiAnalysis: US behind-the-meter datacenter could hit 40GW+ by 2028
SemiAnalysis projects 40GW+ behind-the-meter datacenter capacity by 2028 as grid delays push 50%+ of new builds off-grid.
SemiAnalysis Launches Mythos AI Research Platform
SemiAnalysis launched Mythos, a proprietary AI research platform for semiconductor and AI industry analysis, announced via Twitter on March 5, 2026.
SemiAnalysis: Pretraining Dead for All but Frontier Labs
@SemiAnalysis_ declares pretraining dead for non-frontier labs, citing 'Pretrainitis' as vanity-driven waste. Prompt engineering offers higher ROI.
Anthropic Opus 4.8 Cuts Bug-Finding Cost by 5x, SemiAnalysis Finds
Anthropic's Opus 4.8 + ultracode mode cuts severe bug-finding cost to ~1/5, per preliminary SemiAnalysis experiments with wide error bars.
SemiAnalysis Calls Jensen ComputeX Keynote 'F Tier' Over No AI DC News
SemiAnalysis rated Jensen Huang's ComputeX keynote 'F Tier' for no AI datacenter news and revealed a delayed NVIDIA ARM chip with broken video output.
SemiAnalysis: N3 chip demand far outstrips current consensus estimates
SemiAnalysis argues N3 chip demand far exceeds consensus accelerator models, implying a structural silicon shortage not priced by markets.
SemiAnalysis: Perplexity Slack Bot Beats Claude in Internal Trial
SemiAnalysis found Perplexity's Slack bot beats Claude in internal trial. 96% token budget goes to Anthropic, but usage may shift.
Cerebras Understates On-Chip SRAM by 8x, SemiAnalysis Notes
Cerebras understates on-chip SRAM by 8x per SemiAnalysis, a rare under-specification in chip marketing.
SemiAnalysis: NVIDIA's Customer Data Drives Disaggregated Inference, LPU Surpasses GPU
SemiAnalysis states NVIDIA's direct customer feedback is leading the industry toward disaggregated inference architectures. In this model, specialized LPUs can outperform GPUs for specific pipeline tasks.
Buffett Invests in Google After SemiAnalysis TPU Deep Dive
Berkshire Hathaway invested in Google in Q3 2025, after Buffett studied TPU v5p architecture. He compared it to railroads, citing 8,960 chips and 4.8 Tbps links.
Meta's Superintelligence Compute Ramp Spans 2000km Across Data Centers
Meta's superintelligence compute ramp spans 2000km+ with an RL startup, per SemiAnalysis, marking the most aggressive AI infrastructure build.
Unitree Claims Fastest Iteration Cycle in Global Robotics
@SemiAnalysis_ claims China's Unitree will dominate global robotics due to fastest iteration cycle. No data on iteration time or funding disclosed.
ERCOT datacenter requests exceed grid capacity by 5x
ERCOT datacenter requests far exceed grid underwriting capacity, per @SemiAnalysis_, revealing grid approval as a binding constraint on AI infrastructure buildout.
Cerebras CS4 Stays on 5nm as SRAM Scaling Flattens
Cerebras CS4 stays on 5nm due to SRAM scaling flattening, per @SemiAnalysis_. 3nm offers no density gain, so the chip prioritizes yield and cost.
Median Coding Agent Hits 96k Input Tokens, Rewriting Inference Economics
SemiAnalysis found median coding agent uses 96k input tokens from 432k requests, shifting inference cost focus from output to context.
Vibe-Coding Bottleneck: CPU Box Rental Gets Harder
SemiAnalysis flags that vibe-coding wave makes cheap CPU box rentals less routine, bottlenecking developers who need quick cloud compute for AI prototyping.
Datacenter Developers Flee City Zoning for Unincorporated County Land
Datacenter developers are siting projects on unincorporated county land to avoid city zoning delays, redrawing the AI infrastructure map per @SemiAnalysis_.
NVIDIA Vera Rubin VR NVL72: Value Extraction Engine Arrives
NVIDIA's Vera Rubin VR NVL72 shifts from value vendor to value extractor, targeting TCO. SemiAnalysis argues this overturns prior pricing paradigm.
CPU Demand Flipping the AI Narrative as Datacenter Growth Shifts
A new analysis from SemiAnalysis indicates CPU demand is rising in AI datacenters, reversing a narrative of GPU-only dominance. This shift signals changing workload patterns and infrastructure priorities.
Google Chooses Intel EMIB-T for 9th-Gen TPUs, Breaking TSMC's CoWoS Monopoly
Google picks Intel EMIB-T for 9th-gen TPU, breaking TSMC CoWoS monopoly. Move signals architectural bet on power integrity and reticle-free scaling.
Amazon’s RNG Network Topology Ditches Fat Trees for Random Graphs
Amazon introduced RNG network topology using random graphs instead of fat trees for AI training clusters. No performance data published yet.
Supermicro: Double-Wide Racks, Liquid Cooling, and the Storage Bottleneck
Supermicro CBO says double-wide racks and liquid cooling are standard for AMD Helios and NVIDIA Vera Rubin, and storage is now the main AI bottleneck.
Cerebras, Flex Expand CS-3 Production 7x at Milpitas Facility
Cerebras and Flex expand CS-3 production 7x at Milpitas facility. The partnership keeps wafer-scale AI manufacturing in the U.S. as Nvidia faces delays.
Lightmatter Photonics Joins Nvidia NVLink Fusion for AI Interconnects
Lightmatter joins Nvidia NVLink Fusion with photonic interconnects. Nvidia Kyber rack delayed to 2028.
Nvidia Vera Rubin Rack Costs $7.8M; Memory Drives Price
Nvidia's Vera Rubin rack costs $7.8M with memory as key cost driver; Kyber rack delayed to 2028.
Scale-Across: Cloud Giants Link Datacenters for Million-Accelerator AI Clusters
Cloud providers are linking multiple datacenters for million-accelerator AI clusters, a new 'scale-across' paradigm.
Fable 5 Returns: First Model Lobotomized by US Policy Comes Back Online
Fable 5, lobotomized June 12 under US export controls, returned online today — first frontier model restored by policy.
Google TPU Humufish Drops TSMC CoWoS for Intel EMIB-T
Google's next TPU Humufish uses Intel EMIB-T packaging instead of TSMC CoWoS, breaking the industry default for AI accelerators.