chip design
30 articles about chip design in AI news
MediaTek, GUC, Novatek Build R&D Data Centers for AI Chips
MediaTek, GUC, and Novatek are building dedicated R&D data centers in Taiwan, reflecting the compute intensity of AI and 3nm/2nm chip design. Novatek's NT$2.9B investment signals a major push into custom ASIC services.
InCoder-32B-Thinking Hits 81.3% on LiveCodeBench, Trained on Chip & Kernel Traces
InCoder-32B-Thinking, a 32B parameter model trained on execution traces from chip design, GPU kernels, and embedded systems, scores 81.3% on LiveCodeBench V5 and an 84% compile pass rate on CAD-Coder.
Moonshot AI's Kimi K3: 2.8T params, 1M token window, $3/M input
Moonshot AI released Kimi K3, a 2.8T-parameter mixture-of-experts model with 1M token context window and $3/M input pricing, claiming autonomous chip design and research capabilities.
Jensen Huang's AI Productivity Mandate: Engineers Must Spend 50% of Salary on AI Tokens
NVIDIA CEO Jensen Huang argues that a $500K engineer should spend at least $250K annually on AI inference tokens, framing token consumption as essential as CAD tools for chip design. He claims this investment eliminates perceptions of difficulty, time, and resource constraints in development.
Anthropic Builds In-House Chip Team for Claude Co-Design
Anthropic is building an in-house chip team to co-design hardware with Claude, aiming for faster, cheaper inference. The company maintains a multi-chip strategy with AWS, Google, Nvidia, and AMD.
Google TPU 'Broadfly' Topology Scales Pod to 1,152 Chips
Google unveiled a Broadfly TPU topology at Cloud Next, scaling pods to 1,152 chips — 4.5x larger than Ironwood — with max 7 hops. This inference-first design challenges NVIDIA's NVLink on scale and latency.
Waymo Builds Custom 1,000-TOPS Chip, Cuts Nvidia Dependence
Waymo built a custom 1,000-TOPS robotaxi chip on TSMC 5nm, cutting Nvidia and AMD reliance. The move targets cost reduction as Zeekr-based fleet scales.
MediaTek Targets $2B AI Chip Sales, $80B Custom ASIC Market
MediaTek projects $2B+ AI chip sales in 2026, targets 15-20% of an $80B custom ASIC market by 2027, backed by a $5B board-approved supply chain investment.
Samsung Wins $200B Broadcom AI Chip Deal, Foundry Bet Pays Off
Samsung wins $200B Broadcom AI chip deal, boosting foundry push against TSMC. Partnership covers custom AI chips for data centers.
China Builds First Phase-Change Memristor Neural Chip
Chinese researchers built the first phase-change memristor neural chip, claiming 10,000x energy efficiency but releasing no benchmarks.
China Drafts Rules to Block AI, Chip Exports to West
China is drafting rules to block advanced AI and chip exports to the West, mirroring US controls. The move signals a structural shift in global tech flows.
Meta Custom AMD MI400 Half-Size Chip Targets RecSys, 144GB HBM
Meta custom AMD MI400 half-size chip uses 144GB HBM, targeting recsys workloads for lower cost and power.
zAI Completes 1-Gigawatt AI Data Center Without Nvidia Chips
zAI built a 1GW AI data center in China with no Nvidia chips, using only domestic silicon. It supports frontier GLM model development and has begun operations.
China's 14nm AI Chip Hits 520 TFLOPS Via Architecture, Not Shrink
China's 14nm AI chip claims 520 TFLOPS and 6.4TB/s bandwidth via software-defined and 3D near-memory architecture, bypassing advanced node restrictions.
Apple M7 Ultra Chip Reportedly Supports 1.5TB Unified Memory
Apple's M7 Ultra chip reportedly supports 1.5TB unified memory, doubling the M3 Ultra and matching eight Nvidia B200 GPUs, but DRAM supply constraints threaten pricing.
Meta Iris AI Chip Production May Start September – Report
Meta could produce Iris AI chip in September 2026 for data center inference, per report. Reduces NVIDIA reliance.
DeepSeek, Zhipu AI Build Custom Inference Chips to Cut GPU Dependency
DeepSeek and Zhipu AI are developing custom inference chips to cut GPU costs. China's domestic chip budget share hit 46% in July 2026.
PKU Chip Hits 2.12ms Brain Latency, 478x A100 Speedup
PKU chip achieves 2.12ms step latency with 478x speedup over Nvidia A100 for brain modeling using phase-change memristors.
Amazon Designs Custom AI Silicon for Future Devices, Panay Says
Amazon hardware chief Panos Panay confirmed Amazon is designing its own end-to-end silicon for some devices, signaling a strategic push into custom AI hardware.
Anthropic Explores Custom AI Chip with Samsung
Anthropic is discussing a custom AI chip with Samsung, per The Information. The move follows OpenAI's Jalapeño chip and signals growing vertical integration in AI hardware.
US chip curbs unintentionally accelerated China's open-source AI, study finds
US chip export controls unintentionally accelerated China's open AI ecosystem, with Chinese developers increasing open LLM activity more than US developers after restrictions.
Jim Keller: Tenstorrent IPO Looms as BlackHole Chip Scales
Jim Keller confirmed Tenstorrent's IPO plans as BlackHole chip scales for AI inference, competing with Nvidia. No revenue disclosed.
IBM Shows Sub-1-nm Chips, Targeting Production in 5 Years
IBM showed sub-1-nm chips at IEDM, targeting production in 5 years. It challenges TSMC and Intel in the race to shrink transistors for AI workloads.
OpenAI-Broadcom Chip Hints at Token Price Collapse
OpenAI and Broadcom are co-developing a custom AI inference chip that could cut token prices by an order of magnitude, per @mweinbach. The chip targets inference workloads, not training, and aims to reduce dependency on Nvidia.
Alibaba Chip Unit T-Head Triples Capital to $148M in AI Push
Alibaba's chip unit T-Head tripled capital to $148M, its first injection in 3 years, as the company vertically integrates AI hardware with Qwen models and cloud.
Intel Targets Nvidia, AMD with New AI Chip Launch by End 2026
Intel plans to launch a new AI data center chip by end of 2026, targeting Nvidia and AMD in the AI infrastructure market.
Cerebras Reengineers Mechanical Playbook for Wafer-Scale Chip Cooling
Cerebras disclosed three mechanical innovations—vertical power delivery, flexible interposers, and direct-impingement cooling—to prevent wafer-scale chips from cracking, rewriting engineering fundamentals.
Google’s Virgo network interconnects 134K TPUv8t chips at 47 Pbps
Google's Virgo network interconnects 134,400 TPUv8t chips at 47 Pbps, targeting large-scale training clusters.
Nvidia, Unitree, Sharpa unveil H2+ humanoid robot reference design
Nvidia, Unitree, and Sharpa released H2+, a humanoid robot reference design, at Computex 2026 to standardize physical AI development workflows.
Huawei Hits 1.5µm Bond Pitch in Kirin 2026 Chips, Beats TSMC
Huawei's 2026 Kirin chips achieve 1.5µm hybrid bonding pitch, 16-36x denser than TSMC. Next year targets 1µm.