chip design
30 articles about chip design in AI news
InCoder-32B-Thinking Hits 81.3% on LiveCodeBench, Trained on Chip & Kernel Traces
InCoder-32B-Thinking, a 32B parameter model trained on execution traces from chip design, GPU kernels, and embedded systems, scores 81.3% on LiveCodeBench V5 and an 84% compile pass rate on CAD-Coder.
Jensen Huang's AI Productivity Mandate: Engineers Must Spend 50% of Salary on AI Tokens
NVIDIA CEO Jensen Huang argues that a $500K engineer should spend at least $250K annually on AI inference tokens, framing token consumption as essential as CAD tools for chip design. He claims this investment eliminates perceptions of difficulty, time, and resource constraints in development.
Google TPU 'Broadfly' Topology Scales Pod to 1,152 Chips
Google unveiled a Broadfly TPU topology at Cloud Next, scaling pods to 1,152 chips — 4.5x larger than Ironwood — with max 7 hops. This inference-first design challenges NVIDIA's NVLink on scale and latency.
Meta Iris AI Chip Production May Start September – Report
Meta could produce Iris AI chip in September 2026 for data center inference, per report. Reduces NVIDIA reliance.
DeepSeek, Zhipu AI Build Custom Inference Chips to Cut GPU Dependency
DeepSeek and Zhipu AI are developing custom inference chips to cut GPU costs. China's domestic chip budget share hit 46% in July 2026.
PKU Chip Hits 2.12ms Brain Latency, 478x A100 Speedup
PKU chip achieves 2.12ms step latency with 478x speedup over Nvidia A100 for brain modeling using phase-change memristors.
Amazon Designs Custom AI Silicon for Future Devices, Panay Says
Amazon hardware chief Panos Panay confirmed Amazon is designing its own end-to-end silicon for some devices, signaling a strategic push into custom AI hardware.
Anthropic Explores Custom AI Chip with Samsung
Anthropic is discussing a custom AI chip with Samsung, per The Information. The move follows OpenAI's Jalapeño chip and signals growing vertical integration in AI hardware.
US chip curbs unintentionally accelerated China's open-source AI, study finds
US chip export controls unintentionally accelerated China's open AI ecosystem, with Chinese developers increasing open LLM activity more than US developers after restrictions.
Jim Keller: Tenstorrent IPO Looms as BlackHole Chip Scales
Jim Keller confirmed Tenstorrent's IPO plans as BlackHole chip scales for AI inference, competing with Nvidia. No revenue disclosed.
IBM Shows Sub-1-nm Chips, Targeting Production in 5 Years
IBM showed sub-1-nm chips at IEDM, targeting production in 5 years. It challenges TSMC and Intel in the race to shrink transistors for AI workloads.
OpenAI-Broadcom Chip Hints at Token Price Collapse
OpenAI and Broadcom are co-developing a custom AI inference chip that could cut token prices by an order of magnitude, per @mweinbach. The chip targets inference workloads, not training, and aims to reduce dependency on Nvidia.
Alibaba Chip Unit T-Head Triples Capital to $148M in AI Push
Alibaba's chip unit T-Head tripled capital to $148M, its first injection in 3 years, as the company vertically integrates AI hardware with Qwen models and cloud.
Intel Targets Nvidia, AMD with New AI Chip Launch by End 2026
Intel plans to launch a new AI data center chip by end of 2026, targeting Nvidia and AMD in the AI infrastructure market.
Cerebras Reengineers Mechanical Playbook for Wafer-Scale Chip Cooling
Cerebras disclosed three mechanical innovations—vertical power delivery, flexible interposers, and direct-impingement cooling—to prevent wafer-scale chips from cracking, rewriting engineering fundamentals.
Google’s Virgo network interconnects 134K TPUv8t chips at 47 Pbps
Google's Virgo network interconnects 134,400 TPUv8t chips at 47 Pbps, targeting large-scale training clusters.
Nvidia, Unitree, Sharpa unveil H2+ humanoid robot reference design
Nvidia, Unitree, and Sharpa released H2+, a humanoid robot reference design, at Computex 2026 to standardize physical AI development workflows.
Huawei Hits 1.5µm Bond Pitch in Kirin 2026 Chips, Beats TSMC
Huawei's 2026 Kirin chips achieve 1.5µm hybrid bonding pitch, 16-36x denser than TSMC. Next year targets 1µm.
Inference shift opens door for AI chip startups to challenge Nvidia
Inference shift from training to serving creates opportunities for AI chip startups. Nvidia's $20B Groq acquihire validates disaggregated compute strategies.
The $500B AI Chip Bottleneck: One Material, One Supplier
A single Japanese chemical company supplies 98% of the thin-film material used in every AI chip on earth. NVIDIA is paying half the capex to expand supplier fabs as lead times stretch past 6 months.
Google's Virgo Network Links 134,000 TPU v8 Chips with 47 Pbps Fabric
Google unveiled its Virgo networking stack for TPU v8, capable of linking 134,000 chips in a single fabric with 47 petabits/sec of bi-sectional bandwidth. This represents a massive scale-up in interconnect technology for large-scale AI model training.
VMLOps Publishes NLP Engineer System Design Interview Guide
VMLOps has published 'The NLP Engineer's System Design Interview Guide,' a detailed resource covering architecture, scaling, and trade-offs for real-world NLP systems. It provides a structured framework for both interviewers and candidates.
Google, Marvell in Talks to Co-Develop New AI Chips, Including TPU-Optimized MPU
Google is reportedly in talks with Marvell Technology to co-develop two new AI chips: a memory processing unit (MPU) to pair with TPUs and a new, optimized TPU. This move is a direct effort to bolster Google's custom silicon stack and compete with Nvidia's dominance.
Nvidia Invests $2B in Marvell to Expand NVLink Fusion Chip Partnership
Nvidia is investing $2 billion in Marvell Technology to deepen their partnership on NVLink Fusion, a chip-to-chip interconnect crucial for scaling AI training clusters. This strategic move aims to secure supply and accelerate development of high-bandwidth links between GPUs and custom AI accelerators.
TSMC's $56B 2026 CapEx Fuels AI Chip Race with 22 New Fabs
TSMC is constructing up to 22 advanced semiconductor fabs simultaneously, backed by a $52–56 billion capital expenditure plan for 2026. This unprecedented manufacturing scale is critical for producing the 2nm-and-below chips required by next-generation AI models.
Canada's AI Compute Gap: Google Cloud Montreal Offers 2017-Era Chips
A technical developer's attempt to rent modern AI compute in Canada revealed a stark infrastructure gap, with major providers offering chips as old as 2017, undermining national AI ambitions.
Anthropic Considers Custom AI Chips, Following Google & OpenAI
Anthropic is reportedly considering developing custom AI chips, a strategic move to gain control over its compute infrastructure and reduce costs. This follows similar initiatives by Google, Amazon, and OpenAI.
Broadcom to Manufacture Google TPU Chips in Foundry Partnership
Google has licensed its Tensor Processing Unit (TPU) intellectual property to Broadcom for chip fabrication. This allows Google to earn from its IP while Broadcom manages the complex hardware build and networking integration.
DeepSeek V4 to Run on Huawei Ascend 950PR Chips, Sparking 20% Price Surge
DeepSeek's anticipated V4 model will be powered by Huawei's Ascend 950PR chips, with Alibaba, ByteDance, and Tencent stockpiling hundreds of thousands of units ahead of launch. This has driven chip prices up approximately 20% in recent weeks.
Elon Musk Says Global Chip Fabs Supply Only 2% of Tesla's AI Compute Needs, Driving Terafab Build
Elon Musk stated current global chip fabrication capacity can supply only about 2% of Tesla's AI compute requirements, necessitating the construction of a 'terafab' even if suppliers expand.